universal digital meter

744 — elektor july/august 1981 universal digital meter This digital meter is a great improvement on the pre- vious design (January 1979) through the inclusion of an input stage containing J-FET opamps. This avoids various problems such as an unstable zero- reading. The J-FET inputs provide a very high input impedance and instead of the normal protection diodes, the circuit contains transistors connected as 5V diodes. The transistors used have a much lower leakage current (1 nA) than diodes (20 nA). The reason for selecting such an extensive input stage rests on two factors: The common-mode input range of the CA 3162 is only —0.2 V . . . +0.2 V has a common-mode range of while the 356 opamp —4 V ... +4 V. The second reason is the fact that the input bias current has been reduced consider- 5 ably: that of the CA 3162 is 80 nA while th 3 6 input 1 . ■ ets away with a mere 30 pA. The size of the e g irc uit is determined mainly P4 RV. T1 ... T7 = BC 557 • 100 1117tt LO c by ...