Connection tester

4-42 - elektor april 1982 2114 RAM tester connection testes stay "low". As a result, T1 does not conduct and the LED D5 remains unlit. Because of the OR circuit around D1 ... D4, a single low level at the RAM outputs sets the flipflop N3/N4 and makes the transistor conduct. D5 is then provided with current and lights - something is wrong. The flipflop will not respond to any further error messages. S1 has to be depressed again to initiate a new test cycle once N5 has produced a reset pulse. Now for the actual test cycle. Supposing the first test (the writing and reading of logic ones), was successful and the LED D5 did not light. At the end of another 1024 clock pulses, Q11 goes high and Q10 goes low. The RAM is now in the writing mode and low signals are read in by way of N7. Once Q10 has gone high as well, the RAM will be in the reading mode and the logic zeros are output. If the comparators N9 ... N12 are unable to detect a single logic "1" at their inputs, nothing happens....