glitch suppressor

elektorjuly/august 1983 glitch suppressor in position 2), glitches will not be detected. A signal at the input of Nl is inverted and applied to inputs Al and A2 of the MMV. The multivibrator is triggered by the leading edge of the input signal and emits a pulse of about 7 μs (duration determined by the values of R1 and Cl). With the wire bridge in position 1 as shown, the circuit wilt suppress glitches of 80 ns and shorter, a time based on the delay line in inverters Nl ... N6. The output of N6,and consequently the input at pin B of the MMV, is logic 0. As long as this situation persists, the MVV will not react to signals at its inputs M and A2. If a pulse appears at the input of the circuit, it will arrive at inputs Al and A2 after about 10 ns (that is, the delay of Nl). After about 90 ns the pulse will arrive at the output of N6, so that this output, and therefore input B, becomes logic 1 and inputs Al and A2 are "open". If the input pulse is shorter than about 80 ns, it is no ...