Serial Data Converter

EE JULY/AUGUST 1987 Some computers and communi- cation programs are unable to output serial data composed of 7 data bits and a parity bit. The present circuit has been de- signed to output this data format when it is driven with serial data organized as 1 start bit, 8 data bits, no parity bit, and 1 stop bit. This format is widely used for accessing bulletin boards, data banks, and the like with the aid of a modem, and should be available on most computers equipped with an RS232 port. The converter has a built-in clock generator which can be set to the baud rates shown the circuit diagram, Fig. 1. Both odd and even parity can be gener- ated, and no handshaking is required with the computer or console. The basic operation of the con- verter is as follows (also refer to the timing diagram in Fig. 2). The rising edge of the start bit in the incoming 10-bit word clocks bistable FF1, whose out- put Q goes low and so enables counters IC,, ICza and IC2b, which were previously blocked by ...