80C535 hardware/assembler course (4):

Timer-2 can also generate interrupts. An interrupt is generated If tt has been enabled (bit 5 in regtster IENO), and if subsequently the TF2 or EXF2 btt has been set. It ts, therefore. possible to have an interrupt generated on an overtlow, or a timer reload caused by an extemal event. How this can be achieved is demonstrated by the example below.