Low-Density FPGA Is Small And Economic

December 10, 2013 | 14:37
Low-Density FPGA Is Small And Economic
Low-Density FPGA Is Small And Economic

Lattice Semiconductor has announced the iCE40 LP384 FPGA, the smallest member of its iCE40 family of ultra-low density FPGAs. The new device has room for 384 LUTs, consumes only 25 μW static core power, comes in packages as small as 2.5 x 2.5 mm with a migration path to 2.0 x 2.0 mm, and costs less than 50 cents per unit in large quantity. The programmable logic, flexible IO and on-chip memory can process data at speeds greater than ASSPs or companion microprocessors, while simultaneously reducing power consumption at equivalent cost.

 

The FPGAs are supported by the iCEcube2 development platform, which integrates a free synthesis tool with Lattice's placement and routing tools and includes the Aldec Active HDL simulation solution as well as Waveform Viewer and an RTL/gate-level mixed-language simulator. The iCEcube2 design environment also provides key features and functions that help facilitate the design process for mobile applications, including a project navigator, constraint editor, floor planner, package viewer, power estimator and static timing analyzer.

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