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The Sky is the Limit: GPS as a Time Source


In the latest Elektor-magazine (701), I had a look at the DCF77 test generator. For me this was a bit nostalgic. Mostly the DCF77 is used to synchronize time-clock’s. But since the carrier signal of the DCF77 is produced by an atom clock the DCF77-carrier signal can be used to create a time-reference oscillator (e.g. 10Mhz) that can be used to create very accurate lab-equipment: like frequency counters, accurate synthesizers etc. For me the nostalgic part: many years ago I once build a accurate time-reference using the DCF77 carrier.
 
I was sparring with a AI-chat about using a DCF77 based time-reference, and PLL’s etc..   It became clear to me that in the present time, it is possible to have an even more accurate time-reference oscillator.  This is possible by using the atom clock precise signals from the GPS-satellites (1575,42 MHz). My AI-chat went into the GPS techniques that is quite complex, a lot happens in the satellites and the GPS-receivers. In the GPS-receivers are digital ‘Fractional N Synthesizers’ instead of simple analog PLL’s.  The performance of digital Synthesizers are better then analog PLL’s (that suffer of noise and component tolerances).  During the AI-chat it turned out that you cannot get simply a time-reference oscillator out of a GPS-receiver. It is super time accurate over long term, but suffer of ‘sawtooth-like-phase noise’. 
When you like to produce a truly clean (no phase/noise) output clock you still need external from the GPS-receiver a Digital Synthesizer like logic. So it became clear, because the need of a  Digital Synthesizer like logic, best to use a FPGA.  And since a DDS (Direct Digital Synthesis)  are very related, it can be combined to produce an accurate signal generator.   
 
Then I asked the AI.. can you produce a project-description of how to create a GPS-Disciplined Arbitrary Waveform Generator.
So note nothing is build :-p, but is it a very interesting project (high end).
 
 
 
The Atomic Pulse in Your Lab: Building a GPS-Disciplined Arbitrary Waveform Generator
 
By leveraging the atomic clocks orbiting 20,000 km above our heads, we can discipline a local FPGA-based engine to create a signal generator with near-zero long-term drift. In this project, we combine a u-blox M8N, a Cyclone 10LP FPGA, and a high-speed TX-DAC to build a GPSDO (GPS Disciplined Oscillator) -based Arbitrary Waveform Generator (AWG) that rivals professional lab gear.
 
The Sky is the Limit: GPS as a Time Source
At the heart of the Global Positioning System (GPS) is time. Each satellite carries multiple Rubidium or Cesium atomic clocks, synchronized to a common GPS Time. By measuring the time of flight of signals from multiple satellites, a receiver can solve for its 3D position and, crucially, the exact time.
For our AWG, we aren't interested in where we are, but when we are. A standard crystal oscillator (XTAL) in a lab environment drifts due to temperature and aging. By "disciplining" our local oscillator against the GPS pulse, we achieve the best of both worlds: the low phase noise of a local crystal and the long-term stability of an atomic clock.  (long-term stability about 10^-13   (note: 1ppm = 10^-6))
 
 
Precision at the Front-End: The u-blox NEO-M8N
A GPS module can produce a very accurate blinky light (pulse-per-second (1 PPS)) output. However, the NEO-M8N is a powerhouse that allows us to do much more.
The 1 PPS signal from a u-blox module suffers from quantization error. Because the internal clock of the module (usually 48 MHz) is not a perfect multiple of the GPS second, the physical 1 PPS pulse "jitters" by about 21 ns as it aligns with the nearest internal clock tick. This is known as sawtooth jitter.
To build a high-grade instrument, we don't just "trust" the pulse. We use the UBX-TIM-TP message. This digital packet tells our system exactly how many nanoseconds the next pulse will be off. By capturing this data via the serial port, our FPGA can mathematically subtract this error, providing a reference that is stable to within sub-nanosecond territory after averaging.
 
The Brain: Cyclone 10LP and DDS Logic
The heart of our generator is an Altera Cyclone 10LP FPGA. It performs three critical tasks:
  1. The Time-to-Digital Converter (TDC): Using a 100 MHz local master clock, the FPGA timestamps the incoming 1 PPS. It then applies the correction factor received from the u-blox via an FPGA's UART-bridge.
  2. The PI-Control Loop: A Proportional-Integral (PI) algorithm calculates the frequency error of our local 100 MHz clock. Instead of physically tuning the crystal (which requires a pricey VCXO), we perform digital disciplining by adjusting the step-size of our DDS.
  3. The AWG Engine: We implement a 48-bit Phase Accumulator. This drives two paths—In-phase (I) and Quadrature (Q). By using a Look-Up Table (LUT) or a CORDIC engine, we generate precise Sinusoidal, Cosine, Square, or even arbitrary waveforms stored in internal Block RAM.
Upsampling and the TX-DAC (e.g. DAC5672)
To achieve a high-quality analog output, we utilize the Texas Instruments DAC5672. This is a dual-channel, 14-bit "Transmit DAC" capable of 275 MSPS.
Directly outputting a DDS/AWG signal from a 100 MHz sample clock creates significant "images" and aliasing. To solve this, we implement Digital Interpolation (Upsampling) within the FPGA. By inserting zeros between samples and passing them through a Half-Band FIR filter, we effectively increase the sample rate. This pushes the aliasing products much higher into the frequency spectrum, allowing for a simple, clean analog low-pass filter at the output.
The Dual-DAC setup allows us to output perfect I/Q signals, essential for quadrature modulation experiments or generating circular Lissajous patterns with zero phase-error.
 
Control and Configuration
User interaction is handled via a standard USB port using an FTDI chip. A custom Python GUI or terminal sends commands (frequency, waveform type, phase offset) to the FPGA. The USB-bridge decodes these commands and updates the DDS registers on the fly. This same interface monitors the "Lock" status of our GPS loop, showing us exactly how many parts-per-billion (ppb) our local clock is deviating.
 
Conclusion
Building a GPSDO-AWG is the ultimate exercise in precision electronics. By combining the celestial stability of GPS with the raw processing power of a Cyclone 10LP and the high-speed fidelity of the DAC5672, we create a tool that is not just a signal generator, but a primary frequency standard for the modern home lab.

Technical Specifications (Target):
  • Reference: GPS-Disciplined (u-blox NEO-M8N)
  • Master Clock: 100 MHz (Local) / 275 MHz (DAC Internal)
  • DAC: TI DAC5672 (14-bit Dual, Parallel)
  • FPGA: Intel Cyclone 10LP (10CL016)
  • Frequency Resolution: < 1 µHz
  • Interfaces: USB (FTDI), 1 PPS Input, Dual Analog Out (SMA)