On April 15, Elektor is hosting an online conference dedicated to the use of RISC-V. Thanks to its open, modular, and flexible design, the open standard instruction set architecture (ISA) is becoming increasingly relevant for embedded systems and microcontrollers. The organizers are therefore calling on experts to submit meaningful proposals for presentations. Contributions can be submitted until January 16.

The event “RISC-V – Open Architecture for Embedded, AI, and Automotive” is aimed at professionals involved in the development of embedded systems, hardware designers, firmware and software developers, and engineers in the fields of automotive technology and mobility. Experts from the semiconductor industry, researchers, and students are also part of the target audience. The conference provides these groups with the latest specialist knowledge, developments, and practical experience reports.

Call for Presentations: What Elektor Is Looking for?

We welcome submissions in English tailored to the target audience on topics including the following:
 
  • RISC-V ISA and extensions: Overview of basic ISA (RV32I, RV64I) and optional extensions (M, A, F, vector, matrix, and security extensions)
  • User-defined instructions and domain-specific architectures (DSA): How companies can develop their own instruction sets for automotive, AI, or IoT
  • Trends in modular designs and their impact on performance and scalability
  • Open-source chip design and European semiconductor strategy: Role of RISC-V in initiatives such as Chips JU and the EU Chips Act
  • Firmware development for RISC-V: Use of C/C++ and Rust, debugging, virtual prototyping, and open-source RTOS (e.g., Zephyr, RT-Thread)
  • Software porting and optimization: strategies for migrating from ARM/x86 to RISC-V, including compiler intrinsics and memory models
  • Cybersecurity and security for automotive and IoT: hardware security features (e.g., CHERI extensions), secure boot, and functional safety according to ISO 26262
  • Software-defined vehicle and E/E architectures: Use of RISC-V in zonal and centralized vehicle architectures
  • Cyber Resilience Act and SBOM: Regulatory requirements and best practices for compliance
  • ADAS and autonomous systems: RISC-V-based solutions for real-time and safety-critical applications
  • Matrix and vector extensions for AI: Acceleration of neural networks and ML workloads on RISC-V
  • Open educational resources and FPGA prototyping: Practical approaches for teaching and research
  • The importance of open standards for Europe and global supply chains
  • Business cases and licensing models: How RISC-V is changing the cost structure and speed of innovation
The planned presentations will each last 45 minutes and will be followed by a 15-minute question and answer session. The full program is expected to be published in early February. Tickets for the online conference will also be available for purchase at that time.