Save Early Bird Discount for Elektor's Online Conference on RISC-V

The early bird discount for the online conference “RISC-V – Open Architecture for Embedded, AI, and Automotive” organized by Elektor is only valid until March 20th. The full-day event (9:30 a.m. – 4:45 p.m. CEST) will take place on April 15th and it is aimed at embedded systems engineers, hardware designers, firmware and software developers, semiconductor industry professionals, and academics. If you register now, you'll save €30 at the price valid at a later date.

Register now for €199! (Elektor Members pay only €149) 

Open, Efficient, and Secure

With its open, modular, and extensible instruction set architecture (ISA), RISC-V has become a serious alternative to established processor architectures. The architecture is characterized by its simplicity, efficiency, and freely available open-source foundation. As a result, more and more devices are relying on RISC-V – from AI applications and IoT and embedded systems to automotive technology, cloud infrastructure, and consumer electronics. As a flexible, secure, and cost-effective option, RISC-V is fundamentally changing the chip and software landscape.

At the same time, this development brings new challenges. The success of RISC-V depends heavily on the continuous investment and collaboration of both the community and industry partners to achieve widespread adoption. Known obstacles include fragmentation, a maturity gap compared to established architectures, high testing costs in safety-critical areas, limited EDA/IP access barriers, as well as economic and geopolitical uncertainties.

The conference addresses many of these challenges and provides expertise, trends, and experience reports for the target groups mentioned. 

What the Program Offers

The online conference offers a compact learning experience that combines six practical, 45-minute presentations with 15-minute live Q&As.

Through five of the six presentations that have already been confirmed, participants will
 

• leave with a clear understanding of what RISC-V actually is and the current state of the ecosystem; including some of the fastest growing regions and technical communities,
• examine how the software ecosystem is maturing around areas like automotive, space, industrial, IoT, data centers, and high performance computing,
• learn practical insights into building safe, secure, and high-performance RISC-V based systems by integrating architectural safety mechanisms, microarchitectural optimizations, and advanced compiler technology,
• see how reducing deployment complexity is a strategic necessity to entice busy engineers and move RISC-V from a niche interest toward a viable ARM alternative,
• learn how to run AI with vectors on RISC-V, and
• get a clear roadmap for evaluating RISC-V acceleration in upcoming embedded and edge-AI products.

Conference speakers are Florian Wohlrab (Head of OpenHW Foundation, OpenHW Foundation), Gerard Vink (Head of R&D, TASKING), Marcos Codas (Director of Partnerships and Education, GDevelop), Ji Yong Dijkhuis (Developer, LivingLinux), and Thang Minh Tran (Founder, CEO & CTO, Simplex Micro).

Another presentation is still being coordinated. More information can be found on the conference website.

Why Should You Register?

• Access to 6 expert presentations
• Interactive Q&A and networking via chat and video rooms
• Unlimited access to all recordings and materials
• Convenient online participation from your own desk
• Certificate of participation included

Tickets and Registration