- NXP LPC1517JDB48 ARM Cortex M3 72Mhz processor
- 64kB Flash, 12kB RAM
- Using NXP sophisticated State Configurable Timers to do the precise signal handling for J1850 PWM/VPW protocols
- CAN FIFO buffers for handling some not-strict ISO-compliant ECUs
- Botloader for initial firmware programming
- Low power consumption
The source code is now on GitHub source code repository and the full project page is here.