- on Miscellaneous Electronics
- Published in issue 7/2009 on page 58
Frequency Divider with 50% Duty Cycle
In digital circuit design, especially in microprocessor or measuring applications, it is often necessary to produce a clock signal by dividing down a master clock. The 4-chip solution suggested here is very versatile; it takes a 50% duty cycle input clock and outputs a 50% duty cycle clock selectable (via an 8-way DIP switch) for every divisor from 1 to 255.