PQC Secure Boot Without Redesigning the Chip

PQC secure boot is easy to describe and annoyingly hard to ship in silicon. In this short Elektor TV clip, the speaker looks at the problem from the flash-controller side: small storage devices such as microSD cards have tight boot-time constraints, limited compute, and a real need to verify firmware signatures before handing control to the rest of the system. That makes NIST’s FIPS 204 and its ML-DSA signature scheme more than an abstract standard. It becomes a hardware integration problem.

PQC Secure Boot in a Flash Controller

The clip starts with a useful distinction. AES acceleration, hashing in the data path, and true random-number generation are already familiar parts of secure flash-controller design. They still matter, but they are not the awkward part of the post-quantum migration. The difficult piece is the public-key coprocessor used by the mask ROM to verify the firmware image during secure boot.
 

Replacing that public-key block with support for ML-DSA is not just a case of dropping a new IP block onto an AXI bus. The speaker points to the usual silicon realities: different clock domains, clock gating, power efficiency, logical verification, physical layout, multi-project wafer prototypes, fixes, and finally mask generation. The last item is the part that tends to focus the mind, because mask sets are spectacularly expensive.

Moving Signature Verification into a Secure Element

The proposed escape route is to move most security functions into a secure element while keeping real-time encryption and hashing in the flash data path. In that model, the flash controller’s mask ROM does not verify the firmware signature itself. Instead, it sends the firmware-image header to the secure element, which performs the verification and allows the controller to boot only if the image checks out.

This is also where a stable protocol matters. The clip mentions ISO/IEC 7816, the smart-card communication family, as the kind of interface that can remain fixed while the secure element changes underneath. The controller does not need to know every detail of the next signature algorithm if the command interface is stable enough.

The storage world is already circling this idea. The SD Association’s card-side feature set includes Fast Boot and Secure Boot features, and Swissbit has described a storage-module approach in which NAND flash, a controller, and a secure-element-class security controller work together inside the storage product.

Crypto Agility Without a New Mask Set

For engineers, the key phrase is crypto agility, but here it is crypto agility in a very physical sense. A newer secure element can support different algorithms, larger key sizes, more protected storage for keys, or better resistance against side-channel attacks. The flash controller can remain stable while the security component evolves.

Elektor has also been following this shift from a device-design angle in an upcoming Elektor webinar on post-quantum cryptography for embedded products. That is the point that keeps coming back in practical PQC discussions: product lifetime, certification cost, and hardware redesign cycles can matter just as much as the algorithm itself.

The important lesson from the clip is that post-quantum migration is not simply a library update. In embedded storage, the expensive part may be the physical redesign needed to verify a new kind of signature quickly enough at boot. PQC secure boot through a replaceable secure element is not magic, but it is a practical way to reduce the blast radius of cryptographic change.