Record: lowest embedded SRAM power
13.7 nW/Mbit is claimed by Renesas as a record low stand-by power for embedded SRAM. Speed has been retained at 1.8 ns for an active read-out. The firm said it used its in-house 65-nm silicon-on-thin buried oxide (SOTB) process for the prototype, and used substrate biasing to adjust the leakage/speed compromise. The technology is claimed overcome challenges with conventional CMOS, such as the increased leakage with low-threshold transistors and high variability in gate threshold voltage.