input buffers for the logic analyser

7.36 eiektor juiy/sugust 1981 35 input buffers for the logic analyser The input buffers described here give the logic analyser (Elektors 71, 72 and 73) the following advantages: — the higher input impedance makes it possible to "analyse" CMOS circuits. — the input leads can be lengthened thereby en- abling the logic analyser to be operated more easily. Each buffer consists of a very fast comparator (710) connected as a Schmitt trigger. The hysteresis of such a buffer is determined by the values of the two input resistors (2 x 10 Id2) and the value of the feedback resistor (33 kW. Using the given values the hysteresis is around 1 V . If required, this value can be altered. If the value of the feedback resistor is increased, the hysteresis value is reduced. The values of the trigger voltages also depend on the position of switch Si. In position a, the trigger voltages are about 1 V (logic zero) and 2 V (logic 1) corresponding to TTL and 5 V CMOS levels. With are deter- the switc...