Circuit Shorts: Evolving Hardware

Can hardware evolve? Researchers have been studying circuit evolution for over 25 years.

In 1996 Adrian Thompson of Sussex University published a remarkable paper about an FPGA circuit that evolved to perform certain functions. Using evolutionary algorithms each generation of circuits was scored for fitness by testing it intrinsically — that is, inside the Xilinx XC6216 FPGA itself. If the circuit got any closer to the desired function it was allowed to propagate. Thousands of generations later, the circuit got there: distinguish between 1kHz and 10kHz input signals. And it did it without having a clock of its own and without the use of external components.

Remarkably, some apparently unnecessary parts of the circuit ― to the human eye! ― were essential to its correct performance. Without these elements, the circuit’s fitness degraded; they influenced the circuit indirectly. Moving the same circuit to another part of the same FPGA could degrade its fitness, requiring further evolution; moving the circuit to another same FPGA instance, Thompson predicted, is very likely to also result in various amounts of degradation. With some engineering allowances, however, these effects could make the circuit work across devices and environmental conditions.

The paper is very approachable, and it’s inspiring even 25 years later. Imagine if the fitness evaluation program is implemented inside of the FPGA and it then programs itself according to what function it needs, starting from a small core of a circuit. The result, then, could be made to work only on that single FPGA, and only in one place within it. Non-fungible circuits, anyone?

People are still working on evolvable hardware, but as far as I can tell, it hasn’t found mainstream application, yet. However, Thompson’s findings of physical uniqueness of same-FPGA instances are also used in the creation of Physical Unclonable Functions (PUFs) where the uniqueness of each silicon chip, due to manufacturing variability, is used to create chip-specific IDs.

This work also reminds me that lately semiconductor companies have been revealing that they are using AI to help chip physical placement for creating … AI chips. As with Thompson’s circuit, I wonder how those companies will eventually deal with the uncertainty that’s inherent to the process: a circuit that a human cannot fully understand or re-create on their own is hard ― even impossible ― to fully verify and characterize.

I bet that just repeating Thompson’s experiment on modern hardware would be a really interesting feat. We can do this more easily now that we have open-source FPGA development tools! Who’s up for the challenge?