Industry’s first RISC-V SoC FPGA architecture brings real-time to Linux, giving developers the freedom to innovate in low-power, secure and reliable designs

December 3, 2018 | 09:06
Image: Microchip
Image: Microchip
Key Facts:
  • Demonstrations at RISC-V Summit, Dec. 4-5, show size, power and performance benefits
  • Integrates PolarFire SoC’s hard CPU subsystem with programmable logic
  • New class of SoC FPGAs enables real-time deterministic behaviour on a rich Linux platform
  • Mi-V Embedded Experts Program supports customers worldwide in PolarFire SoC designs

Microchip, via its Microsemi Corporation subsidiary, announces an extension to its Mi-V ecosystem by unveiling the architecture for a new class of SoC FPGAs at the RISC-V Summit, Dec. 4 to 5, 2018. The new family combines the industry’s lowest power mid-range PolarFire FPGA family with a complete microprocessor subsystem based on the open, royalty-free RISC-V Instruction Set Architecture (ISA).
 
Announced at the RISC-V Summit in Santa Clara, California, Microchip’s new PolarFire SoC architecture brings real-time deterministic Asymmetric Multiprocessing (AMP) capability to Linux platforms in a multi-core coherent Central Processing Unit (CPU) cluster. The PolarFire SoC architecture, developed in collaboration with SiFive, features a flexible 2 MB L2 memory subsystem that can be configured as a cache, scratchpad or a direct access memory. This allows designers to implement deterministic real-time embedded applications simultaneously with a rich operating system for a variety of thermal- and space-constrained applications in collaborative, networked IoT systems.
 
In a new era of computing driven by the convergence of 5G, machine learning and the Internet of Things (IoT), embedded developers need the richness of Linux-based operating systems. These must meet deterministic system requirements in ever lower power, thermally-constrained design environments, while addressing critical security and reliability requirements. Traditional System-On-Chip (SoC) Field Programmable Gate Arrays (FPGAs) blend reconfigurable hardware with Linux-capable processing on a single chip to provide developers with ideal devices for customisation, yet consume too much power, lack proven levels of security and reliability, or use inflexible and expensive processing architectures.
 
PolarFire SoC includes extensive debug capabilities including instruction trace, 50 breakpoints, passive run-time configurable Advanced eXtensible Interface (AXI) bus monitors and FPGA fabric monitors, in addition to Microchip’s built-in two-channel logic analyzer, SmartDebug.
 
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