New Digital Signal Controller (DSC) Accelerates DSP performance for time-critical control applications

September 17, 2018 | 08:50
Image: Microchip
Image: Microchip
Key Facts:
  • Microchip’s highest performance single-core DSC in an ultra-small package
  • Enhanced deterministic performance with the design simplicity of a microcontroller
  • Faster instruction execution, reduced interrupt latency and integrated safety features
  • Almost doubles the performance of previous single-core dsPIC® microcontrollers

Microchip announces a new family of dsPIC33CK 16-bit Digital Signal Controllers (DSC) which provides system designers with Digital Signal Processing (DSP) power combined with the design simplicity of a microcontroller (MCU). Designed to deliver faster deterministic performance in time-critical control applications, the dsPIC33CK have expanded context selected registers to reduce interrupt latency and new, faster instruction execution to accelerate Digital Signal Processor (DSP) routines. The dsPIC33CK single-core family complements the recently announced dsPIC33CH dual-core family based on the same core.
With 100 MIPS performance, the core of the dsPIC33CK delivers almost double the performance of previous single-core dsPIC® DSCs, making it ideally suited for motor control, digital power and other applications requiring sophisticated algorithms such as automotive sensors and industrial automation. It has been designed specifically for controlling multiple sensorless, brushless motors running field-oriented control algorithms and power factor correction.
The new DSCs are also designed to ease functional safety certification required by many automotive, medical and appliance applications where safe operation and shutdown in failure situations are critical. The devices include integrated functional safety features for safety-critical designs such as: RAM Built-In Self-Test (BIST) for checking RAM health and functionality; Deadman Timer for monitoring the health of application software through periodic timer interrupts within a specified timing window; Dual Watchdog Timers (WDT); Flash Error Correction Code (ECC); Brown Out Reset (BOR); Power On Reset (POR); and Fail Safe Clock Monitor (FSCM).
The dsPIC33CK family features a CAN-FD communication bus to support new automotive communication standards.
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